1. Technology Field
The present invention relates to a data writing and reading method for a rewritable non-volatile memory module and a memory controller and a memory storage apparatus using the same, wherein more error bits are corrected by using an existing error checking and correcting (ECC) circuit.
2. Description of Related Art
Along with the widespread of digital cameras, cell phones, and MP3 in recently years, the consumers' demand to storage media has increased drastically. Rewritable non-volatile memory is one of the most adaptable storage media to portable electronic products (for example, notebook computers) due to its many characteristics such as data non-volatility, low power consumption, small volume, non-mechanical structure, and fast access speed. A solid state drive (SSD) is a storage apparatus which uses a flash memory as its storage medium. Thereby, the flash memory industry has become a very important part of the electronic industry in recent years.
Because error bits may be produced in data stored in a flash memory due to various factors (for example, electric leakage of memory cells, program failure and so on), in general, an ECC circuit is configured in a memory storage system and an ECC code is generated for the data stored therein, so as to ensure the accuracy of the data.
To be specific, when a computer host connected with a flash memory storage apparatus sends data to be written into the flash memory storage apparatus, the ECC circuit of the flash memory storage apparatus generates a corresponding ECC code, and a control circuit of the flash memory storage apparatus writes both the data and the ECC code into the flash memory module of the flash memory storage apparatus. Subsequently, when the computer host is about to read the data from the flash memory storage apparatus, the control circuit reads the data and the corresponding ECC code from the flash memory module, and the ECC circuit executes an error checking and correcting procedure on the data according to the corresponding ECC code to ensure the accuracy of the data.
FIG. 1 is a diagram illustrating the data structure of data written into and read from a flash memory storage apparatus.
Referring to FIG. 1, during the data writing operation, an original data OD and an ECC code EC corresponding to the original data OD are written into the flash memory storage apparatus. Subsequently, when the original data OD is read from the flash memory storage apparatus, the ECC code EC is also read and an error checking and correcting procedure is executed on the original data OD according to the ECC code EC. For example, when the read data is accurate, the control circuit sends the read data to the computer host. When there are error bits EB in the read data, the error checking and correcting procedure executed by the ECC circuit tries to correct the error bits EB. Herein if the number of the error bits EB is within a correctable range, the error bits EB are corrected and the control circuit sends the corrected data to the computer host. Contrarily, if the number of the error bits EB exceeds the correctable range, the control circuit notifies the computer host that the data is lost.
Thereby, how to correct more error bits has become one of the major subjects in the industry.
Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present invention. Furthermore, citation or identification of any document in this application is not an admission that such document is available as prior art to the present invention, or that any reference forms a part of the common general knowledge in the art.